The present invention relates to a buffer circuit such as an input/output buffer, an input buffer, and an output buffer.
Consumer demand has been increasing for personal computers and peripheral devices having lower power consumption. To meet this demand, circuits for personal computers and peripheral devices have been made more compact so that they can operate at lower voltages. A circuit operating under low voltage must be protected from the input of signals having a voltage greater than or equal to the operation voltage. Protection of a circuit that operates under a low voltage is also necessary when electric power is not supplied from a power supply.
Normally, a personal computer is connected to peripheral devices, such as a display, a mouse, a printer, a storage device, a modem, and game devices by a bus and an input/output (I/O) port. The bus may be categorized into an internal bus and an external bus. An internal bus connects the CPU and memory. An external bus connects the CPU and an I/O device (graphic board or SCSI board). Examples of an external bus are Industrial Standard Architecture (ISA), Peripheral Component Interconnect (PCI), Small Computer System Interface (SCSI), IEEE 1394, Universal Serial Bus (USB), and Integrated Drive Electronics (IDE; ATA (AT Attachment)).
An I/O port, which is an interface for connecting a personal computer and peripheral devices, generally includes an exclusive connector. Examples of an I/O port are a serial port connected to a mouse or a modem, a parallel port connected to a printer, and a game port connected to a game device.
In accordance with the lowered power consumption of electronic equipment, such as personal computers and peripheral devices, the operation voltage for an interface (I/O port) connected to electronic devices has been reduced. However, electronic devices include a plurality of circuits operating at different voltages. The I/O ports of such electronic devices include an input/output buffer applicable to the input of a voltage signal of which voltage is greater than the operation voltage.
For example, when an I/O port is connected to a joy stick device, the operation voltage of the input/output buffer is 3.3 V. Further, a voltage signal of 5 V for operating the joy stick device is provided to the input terminal of the input/output buffer. Therefore, the input/output buffer must be applicable to the input of the voltage signal (5 V), which is greater than the operation voltage (3.3 V).
Japanese Laid-Open Patent Publication No. 2004-7212 describes an input/output buffer capable of protecting circuits from an externally provided voltage signal irrespective of whether or not operation power is supplied.
The input/output buffer includes a power supply circuit 1 for converting the externally provided voltage signal to a suitable reference voltage corresponding to the voltage of a high-potential power supply. As shown in FIG. 1, the power supply circuit 1 includes diode connected P-channel MOS transistors Pt11 to Pt15. The back gate of each of the transistors Pt11 to Pt15 is connected to a node having a voltage differing from the voltages of a high-potential power supply VDE and a low-potential power supply VSS. When a voltage signal EB is received from an external device, the transistors Pt11 to 15 prevent high voltage from being applied between the gate and the back gate of the transistors Pt 11 to Pt15 irrespective of whether or not power is being supplied from the high-potential power supply VDE.
The power supply circuit shown in FIG. 1 includes a plurality of series-connected N-channel MOS transistors Nt9 to Nt12. Each transistor Nt9 to Nt12 includes a gate and a drain, which are connected to each other. The transistors Nt9 to Nt12 and a transistor circuit Pt10 configure a route (DC path) through which direct current flows between the high-potential power supply VDE and the low-potential power supply VSS. The flow of a slight amount of current through the DC path prevents the operation of the power supply circuit from being unstable. However, the slight amount of current (leakage current) flowing through the DC path becomes a hindrance in reducing power consumption.
A power supply circuit 2 shown in FIG. 2 has been proposed to reduce leakage current and enable miniaturization. In FIG. 2, “Diode” denotes a plurality of diode-connected transistors, that is, the transistors Pt11 to Pt15 and a resistor R2 as shown in FIG. 1.
The power supply circuit 2 includes a transistor circuit Nt13 having a gate and a source that are connected to each other. This configuration reduces leakage current. Further, the power supply circuit 2 of FIG. 2 is more compact than the power supply circuit 1 shown in FIG. 1.